Panels

Panel #1: 2.5D/3D Heterogeneous Integration: Challenges and Opportunities

Session Chair/Moderator: Yuanqing Cheng


Abstract: With the continuous shrinking of chip feature size, the continuation of Moore's Law becomes an increasingly challenging task. The emerging of AI and cloud computing aggravates the problem further. 2.5D Chiplet and 3D stacking for heterogeneous integration becomes one of promising technologies to build “Big Chips”, which can provide ultra-high bandwidth and computing efficiency within acceptable budget. This panel invites some experts working in this field to introduce their pioneering work in 2.5D/3D integration and share their viewpoints of the prospects of 2.5D/3D integration.

Ying Wang (Institute of Computing Technology, Chinese Academy of Sciences)
Biography: Dr. Ying Wang is a professor in Institute of Computing Technology, Chinese Academy of Sciences, Beijing, and his current research interest includes the chip design automation, reliable computer architecture and memory system. He has published over 100 papers on IEEE/ACM conferences and journals, including TC, DAC and ICCAD. He has received several awards from international conferences, including the championship of IEEE LPIRC contest at DAC 2016, the championship of the System Design Contest at DAC 2018, the Best Paper Award at ITC-Asia and ICCD.
Talk Title: A 22nm 1024-core RISC-V Processor Agile Customized by 64 Reusable Chiplets with Low-latency High-flexibility Die-to-Die Interconnection
Abstract: Designing a customized many-core processor typically takes considerable efforts and time overhead, leading to a significant gap between evolving application requirements and lengthy design cycles. In recent years, chiplet-based integration emerges as an agile solution by reusing pre-fabricated dies. We design a chiplet (Zhejiang-1) featuring low-latency, flexible die-to-die interconnects, supporting various inter-core topologies. Additionally, we propose the Sunflower architecture for chiplet integration with advanced packaging. Finally, we employ the proposed chiplets to customize 1024-core processors for privacy computing and neuromorphic computing as a test-case of agile chiplet-based design flow.

Qinzhi Xu (Institute of Microelectronics, Chinese Academy of Sciences)
Biography: Doctor Qinzhi Xu is currently a professor and doctoral supervisor in Institute of Microelectronics of the Chinese Academy of Sciences. His main research interests focus on multiphysics modeling and software development of heterogeneous integration systems, theories and modeling simulators of chemical mechanical planarization, design for manufacturability in nano-scale integrated circuits and development of models and simulation tools for predicting the structure and properties of polymeric materials. He has undertaken more than 20 National, Beijing City, Chinese Academy of Sciences and Enterprise projects, published over 40 modeling papers in interdisciplinary fields of integrated circuits, EDA, polymer nanocomposites, and computational chemistry as the first or corresponding author, applied for nearly 50 patents as the first inventor and obtained several software copyrights of chiplet simulation. He also has received the Third Prize of Beijing Science and Technology Award and the Second Prize of Science and Technology Award of the Chinese Institute of Electronics.
Talk Title: Multiphysics Simulation of Chiplet Heterogeneous Integration System
Abstract: Entering the post Moore era, silicon based CMOS technology faces significant challenges in terms of physical principles and process technologies by reducing size to improve integration. The manufacture cost and design difficulty of system on a chip (SoC) technology gradually increase in recent years. Chiplet heterogeneous integration (CHI) technology, which can divide the large SoC chip into small ones, becomes an important technology because of its reduction of manufacture cost and improvement of chip yield. However, the increase of power density and the deterioration of heat dissipation environment strongly influence the functionality and stability of chips and integrated systems. The coupling effect of electrical, thermal, and mechanical stress poses a serious challenge to the reliability of CHI system. Therefore, the multiphysics simulation of CHI system has become a key technology that urgently needs to be solved in the EDA industry. This talk will briefly introduce the research background, technical challenges, and research progress of CHI systems. Some suggestions for multiphysics simulation of CHI systems will also be provided.

Xiangkun Yin (Xidian University)
Biography: Xiangkun Yin, received the Ph.D. degree from School of Microelectronics, Xidian University in 2017. From 2019 to 2020, he conducted academic research as a visiting scholar with the School of Computer Science, University of Manchester, United Kingdom. And now, he is Associate professor with the School of Integrated Circuits, Xidian University. His current research interests including 3-D ICs based on the TSV, and silicon-based RF/Microwave circuits and Micro-systems. He has authored over 30 internationally refereed journal articles and more than 20 international conference papers. He is also a reviewer of the IEEE Transactions on Microwave Theory and Techniques, the IEEE Microwave and Wireless Technology Letters, the IEEE Transactions on Electromagnetic Compatibility.
Talk Title: Research Progress of Silicon-based 3D Integrated Passive Devices and Circuits with Through-Silicon Vias Technology
Abstract: For more than half a century, integrated circuit has consistently followed Moore's Law in scaling down the technology node. As the future Moore's Law is reaching limitation, the continuous needs for increased performance, further miniaturization and reduced cost have driven the development of new and more advanced integrating and innovation packaging solutions. The emerging three-dimensional integrated circuit (3-D IC) technology, stacking multiple silicon layers vertically, offers an attracting solution to footprint miniaturization and monolithic integration of multiple modules and integrated passive devices. However, some critical challenges remain in the high-density interconnections and high-quality passive components. On the one hand, with the improvement of the system functions and complexity, the signal interconnection density among multiple modules are dramatically increased, which introduces serious problems such as electromagnetic loss, transmission delay, signal distortion, and dramatic increase in power consumption. On the other hand, limited by the dielectric constant and magnetic permeability of semiconductor materials, the capacitance density and inductance density of passive components are difficult to be significantly improved within the existing framework and technology, resulting in key passive components such as capacitors, inductors, filters, etc., which always consume a large footprint. In this work, some of the latest research progress of broadband interconnect structures and integrated passive devices and circuits based on silicon-based 3D integration technology and Through-silicon via (TSV) is introduced, and the development trends of various devices and functional circuit modules are prospected and discussed.

Yang Yu (Harbin Institute of Technology)
Biography: Yang Yu (Senior Member, IEEE) received her B.S., M.S. and Ph.D. degrees with the Department of Automatic Test and Control from the Harbin Institute of Technology in Harbin, China in 2002, 2004 and 2008, respectively.
She is currently a Full Professor with the Department of Test and Control Engineering, School of Electronics and Information Engineering, HIT. Shi is also the Deputy Dean of School of Future Technology, HIT, China. Her current research interests include automatic testing, diagnostic and prognostics for electronics and electrical systems. She is the Vice President of IEEE WIE(Harbin).
Talk Title: Key Test Techniques for M3D ICs
Abstract: Monolithic three-dimensional integrated circuits (M3D ICs) have higher integration and better performance compared to 3D ICs based on through-silicon vias (TSVs). However, high integration density and substantial scaling of the inter-layer dielectric (ILD) make M3D ICs extremely prone to process defects. M3D IC testing is essential to ensure the large-scale application of M3D ICs. This report will share the opportunities and challenges faced by M3D integration technology, and introduce existing M3D IC test technologies. Furthermore, we will introduce the relevant work carried out by our team, including ILD void detection technology and MIV test technology. The proposed works have high test resolution while ensuring low test overhead.
Panel #2: LLM for Chip Design: Challenge and Opportunitie

Session Chair/Moderator: Ying Wang


Abstract: Recently, the rapid progress of large language models(LLM) has brought new opportunities and possibilities to automatic hardware design fields. This panel aims to bring together the pioneers who have either research experience or practiced this new design paradigm in their works, and share their valuable views and first-hand conclusions about the exploration of LLMs in the area of EDA and architecture design. The topic to be covered includes how to utilize the interactive LLMs to accelerate chip design (Both logic level and physical level), synthesis and verification processes, and how to finally achieve zero-code EDA innovation by means of AI agents. We will bring together researchers, industry experts to exchange ideas, share experiences, and discuss the latest advancements in LLM for EDA methodologies, algorithms, and tools.

Zidong Du (Institute of Computing Technology, Chinese Academy of Sciences)
Zidong Du is an associate professor at Intelligent Processor Research Center, Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS). His research interests mainly focus on novel architecture for artificial intelligence, including deep learning processors, inexact/approximate computing, neural network architecture, neuromorphic architecture. He has published over 20 top-tier computer architecture research papers, including ASPLOS, MICRO, ISCA, TC, TOCS, TCAD. For his innovative works on deep learning processors, he won the best paper award of ASPLOS’14, Distinguished Doctoral Dissertation Award of CAS (40/10000), Distinguished Doctoral Dissertation Award of China Computer Federation (10 per year).

Junchi Yan (Shanghai Jiao Tong University)
Junchi Yan, Full Professor in Department of Computer Science & Engineering, Shanghai Jiao Tong University. He is the PI of many major projects of the Ministry of Science and Technology/NSFC/Ministry of Education. He was once the chief researcher of cognitive computing with IBM China Research. He has published over 200 CCF-A papers as first/correspondence authors, and the google scholar citation is approaching 17000. He is a Fellow of IET.

Xi Wang (Southeast University)
Xi Wang is a professor in Southeast University, Nanjing. He received the Ph.D. degree in computer science from Texas Tech University, Lubbock, TX, USA, in 2020, under the advisement of Dr. Yong Chen and Dr. John D. Leidel.,He is a also Senior Engineer with the National Center of Technology Innovation for EDA, Nanjing, China. He was the Post-Doctoral Researcher and a Research Scientist with the RIOS Laboratory, Tsinghua University, Beijing, China, working under the guidance of Dr. David A. Patterson and Dr. Zhangxi Tan. His research interests include computer architectures, agile hardware design, EDA, compilers, machine learning, and parallel computing.(Based on document published on 20 December 2023).

Qiang Xu (The Chinese University of Hong Kong)
Qiang Xu is a Professor at The Chinese University of Hong Kong, his current research interests are in the broad areas of AI and EDA. He has published 180+ papers with 8000+ citations, including several best papers at prestigious conferences and an ICCAD Ten Year Retrospective Most Influential Paper. He has supervised ~20 Ph.D. dissertations and his students have won EDAA Outstanding Dissertation Award and the semi-finals of IEEE TTTC Doctoral Thesis Award.

Bei Yu (The Chinese University of Hong Kong)
Bei Yu is currently an Associate Professor at the Department of Computer Science and Engineering, The Chinese University of Hong Kong. He received PhD degree from Electrical and Computer Engineering, the University of Texas at Austin in 2014. His current research interests include machine learning with applications in VLSI CAD and computer vision. He has served as TPC Chair of 1st ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), served in the program committees of DAC, ICCAD, DATE, ASPDAC, ISPD, the editorial boards of ACM Transactions on Design Automation of Electronic Systems (TODAES), Integration, the VLSI Journal. He is Editor of the IEEE TCCPS Newsletter. Prof. Yu received seven Best Paper Awards from ASPDAC 2021 & 2012, ICTAI 2019, Integration, the VLSI Journal in 2018, ISPD 2017, SPIE Advanced Lithography Conference 2016, ICCAD 2013, six other Best Paper Award Nominations (DATE 2021, ICCAD 2020, ASPDAC 2019, DAC 2014, ASPDAC 2013, and ICCAD 2011), six ICCAD/ISPD contest awards.

Jianwang Zhai (Beijing University of Posts and Telecommunications)
Jianwang Zhai is currently an assistant professor at Beijing University of Posts and Telecommunications (BUPT). Prior to that, he got his Ph.D. in Computer Science and Technology from Tsinghua University (THU) in 2023, and received my B.Eng. from Beijing Jiaotong University (BJTU) in 2018. My research interests include machine learning and optimization methods with applications in EDA, especially power modeling, design space exploration, and physical design.
Panel #3: The Future of Analog CAD: Navigating the Spectrum between Full Automation and Human Expertise

Session Chair/Moderator: Keren Zhu


Abstract: In recent years, the field of analog integrated circuit (IC) design has been transformed by significant advances in design automation. Initiatives like DARPA's "no-human-in-the-loop" programs and subsequent research projects have pushed the boundaries of fully-automated Electronic Design Automation (EDA) software, aiming to revolutionize the industry's traditional workflows. However, alongside these advancements, there's a growing body of research advocating for the retention of human involvement, particularly through approaches like interactive analog layout design. This panel seeks to explore the evolving role of humans in analog CAD, debating the merits and demerits of full automation versus human-in-the-loop approaches. It will convene experts from academia, engineering, and business to provide a comprehensive perspective on this critical junction in CAD technology's future. The discussion aims to unravel whether the pursuit of complete automation is the ideal path or if the nuanced judgment of human engineers still holds indispensable value in the analog design process.

Xuan Zeng (Fudan University)
Xuan Zeng received the B.S. and Ph.D. degrees in electrical engineering from Fudan University, Shanghai, China, in 1991 and 1997, respectively., She is currently a Full Professor with the Microelectronics Department, Fudan University, where she served as the Director of the State Key Laboratory of Application Specific Integrated Circuits and Systems from 2008 to 2012. She was a Visiting Professor with the Department of Electrical Engineering, Texas A&M University, College Station, TX, USA, and the Microelectronics Department, Technische Universiteit Delft, Delft, The Netherlands, in 2002 and 2003, respectively. Her current research interests include analog circuit modeling and synthesis, design for manufacturability, high-speed interconnect analysis and optimization, and circuit simulation., Prof. Zeng received the Changjiang Distinguished Professor with the Ministry of Education Department of China in 2014, the Chinese National Science Funds for Distinguished Young Scientists in 2011, the First-Class of Natural Science Prize of Shanghai in 2012, the 10th For Women in Science Award in China in 2013, and the Shanghai Municipal Natural Science Peony Award in 2014. She received the Best Paper Award from the 8th IEEE Annual Ubiquitous Computing, Electronics and Mobile Communication Conference 2017. She is an Associate Editor of IEEE Transactions on Circuits and Systems—Part II: Express Briefs, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, and ACM Transactions on Design Automation of Electronic Systems.

Zhou Jin (China University of Petroleum, Beijing)
Dr. Zhou JIN received her M.S. and Ph.D. degrees from the Graduate School of Information, Production, and Systems at Waseda University in Japan in 2012 and 2015, and B.S. degree from Nanjing University in 2010. Currently, she is as an Associate Professor with the Super Scientific Software Lab at China University of Petroleum-Beijing. Her research interests mainly focus on simulation and verification technologies for nonlinear large-scale integration (LSI) circuits and systems, AI and GPU acceleration in Electronic Design Automation (EDA), and parallel linear algebra. She actively leads or takes part in multiple government-funded and industrial collaborative projects, such as the National Science Foundation of China’s Key Programs, China’s National Key R&D Program, and Programs from leading industries. Her work has been extensively published at top-tier conferences and journals, including DAC, TCAD, PPoPP, IPDPS, and TODAES. She was a recipient of IEEJ Kyushu Branch Chairman’s Award and Young Elite Scientists Sponsorship Program of Beijing Association for Science and Technology.

Liu Yang (Empyrean Technology Co.)
Yang Liu is a senior product director at Empyrean Technology Co. He obtained his Ph.D. from Tsinghua University and has twenty years of experience in the EDA (Electronic Design Automation) industry. His research interests include circuit simulation and high-performance computing among other areas.

Guoyong Shi (Shanghai Jiao Tong University)
Guoyong Shi is currently a full professor of the School of Microelectronics, Shanghai Jiao Tong University. He received the Bachelor of Science degree in Applied Mathematics from Fudan University, Shanghai, China in 1987, the Master of Science degree in Electronics and Information Science from Kyoto Institute of Technology, Kyoto, Japan in 1997, and the Ph.D. degree in Electrical Engineering from Washington State University, Pullman, USA in 2002. He visited Eindhoven University of Technology as a visiting research fellow from January to June 2001. From August 2002 to June 2005, he was a postdoctoral research fellow in the Department of Electrical Engineering, University of Washington in Seattle, USA, working on Electronic Design Automation. His current research interests include design automation tools for nanometer integrated circuits, with focuses on symbolic simulators, variation-aware signal analysis and statistics tools, and future-technology oriented design automation tools. He has published about 40 research papers in the areas including Computer-Aided VLSI Design and Control Theory.

Zuochang Ye (Tsinghua University)
Zuochang Ye received the B.S. and Ph.D. degrees from Tsinghua University, Beijing, China, in 2002 and 2007, respectively., From 2007 to 2008, he was a Research Scientist with the Cadence Research Laboratories, Berkeley. He is currently an Associate Professor with the Institute of Microelectronics, Tsinghua University. His research interest is computer-aided design for VLSI circuits, particularly on numerical algorithms for EM simulation and circuit simulation.

Xiyuan Tang (Peking University)
Xiyuan Tang is currently an assistant professor at Peking Unversity. Xiyuan received the B.Sc. degree (Hons.) from the School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China, in 2012, and the M.S. and Ph.D. degree in electrical engineering from The University of Texas at Austin, Austin, TX, USA, in 2014 and 2019 respectively. From 2014 to 2017, he was a Design Engineer with Silicon Laboratories, Austin, TX, where he was involved in the RF receiver design. He was a postdoctoral researcher at University of Texas at Austin from 2019 to 2021. His current research interests include analog/mixed-signal circuits, intelligent sensors, and ICs for human healthcare.
Panel #4: When Math Meets EDA: A Tale of Two Disciplines

Session Chair/Moderator: Tao Cui


Abstract: It turns out that the EDA industry is already full of math and advanced numerical computation.In this panel session, a few topics on the interdisciplinary research on mathematics and EDA will be discussed and debated by the panelists.

Yangfeng Su (Fudan University)
Yangfeng Su received the B.S. and Ph.D. degrees in computational mathematics from Fudan University, Shanghai, China, in 1986 and 1992, respectively. He is a Full Professor with the School of Mathematical Sciences, Fudan University. His research interests include model order reduction, linear and nonlinear eigenvalue problems, and sparse expression and its applications.

Wenxing Zhu (Fuzhou University)
Wenxing Zhu received the B.S. degree in Mathematics, the M.S. and Ph.D. degrees in Operations Research, all from Shanghai University in 1989, 1992 and 1996, respectively. He is a “Jia-Xi” Distinguished Professor with the Center for Discrete Mathematics and Theoretical Computer Science, Fuzhou University. His main research interest lies in VLSI physical design and discrete Optimization. His research was mainly supported by the National Natural Science Foundation of China, and the National Key Research and Development Program of China. He has published more than 100 papers in reputed academic journals and conferences, like IEEE TCAD, IEEE TC, DAC, ICCAD, and INFORMS JOC. He won the First Prize Award in Natural Sciences, Ministry of Education of China, in 2022; the Operations Research Application Award of the Operations Research Society of China, in 2020. He received Best Paper Awards from DAC 2017, ISEDA 2023, and won Best Paper Award Nominations at ICCAD 2018 and CCF-DAC 2023. He also won the Second Prize Award of the National Teaching Achievement in 2009.

Yingzhou Li (Fudan University)
Yingzhou Li is an Assistant Professor at Fudan University. Li obtained his Ph.D. from Stanford University in 2017 and was a Phillip Griffiths Research Assistant Professor at Duke University from 2017 to 2020. His research focuses on designing and analyzing efficient algorithms to address problems from various fields, including differential and integral equations, computational chemistry, machine learning, quantum computing and EDA.

Quan Chen (Southern University of Science and Technology)
Dr. Quan Chen graduated from the Department of Electrical and Electronic Engineering at the University of Hong Kong. He was then a postdoctoral fellow at the University of California, San Diego (UCSD) and a research assistant professor at the University of Hong Kong. In 2019, he joined the School of Microelectronics, Southern University of Science and Technology as an assistant professor. Dr. Chen focuses on large-scale analog/RF circuit simulation, multiphysics analysis, and TCAD simulation of advanced semiconductor devices in electronic design automation (EDA). He has received the 2012 ICCAD Best Paper Award Nomination and the second prize of the 2020 Wu Wenjun Artificial Intelligence Chip Award, and was selected for the Shenzhen Peacock Team. He is leading or participating in multiple government-funded projects, including the Key and the Special Programs of NSFC and the Key R&D Program of Guangdong Province, as well as several industrial collaborative projects. He has rich experience in EDA technology transfer and commercialization.

Lang Zeng (Beihang University)
Lang Zeng (Senior Member, IEEE) received the B.S. and Ph.D. degrees in microelectronics from Peking University, Beijing, China, in 2007 and 2012, respectively.,From 2009 to 2011, he was a Visiting Scholar with Purdue University. From 2012 to 2014, he was a Post-Doctoral Associate with the Institute of Microelectronics, Peking University. He is currently an Associate Professor with the School of Integrated Circuit Science and Engineering, Beihang University, China. His research interests include carrier transport in nanoscale devices and 2D material, all spin logic devices, neuromorphic computing based on spintronics, and the reliability issues of PMA STT-MRAM.

More panels will be updated soon.