EDA² | ISEDA 2024

Abstract: A cycle-accurate power estimation model plays a crucial role in the early stages of chip design, which can assist the chips to meet the power, performance, and area (PPA) requirements. PPA are critical factors in determining the overall quality and success of a chip design, as they directly impact its efficiency, speed, and cost-effectiveness. While commercial electronic design automation (EDA) tools such as PrimeTimePX are currently employed for power analysis, their efficiency remains notably low. In this paper, we propose a novel framework, named CAPEDL, which can address the limitations of traditional approaches and improve the accuracy of power consumption estimation. CAPEDL utilizes a two-step deep learning network comprising an auto-encoder network for signal compression and a multilayer perceptron (MLP) model for power estimation. We use various circuits to evaluate the effectiveness of the CAPEDL framework. The experimental results show that CAPEDL outperforms the state-of-the-art approaches, with a normalized root mean squared error (NRMSE) of less than 3% and an average power error of less than 1%.

Abstract: One of the promising applications of Large Language Models (LLMs) is code generation. However, evaluating the quality of the generated code poses a significant challenge. Existing evaluation methods such as Rouge or HumanEval have limitations in terms of accuracy or efficiency. In this paper, we propose a formal evaluation tool called FormalEval, which automates the process of checking generated code without the need for manual test case curation. We evaluated our method on common tasks related to Register-Transistor-Level (RTL) Verilog and SystemVerilog Assertions (SVA) generation in the field of Electronic Design Automation (EDA). Our method not only identifies 23\% of evaluation error in existing RTL benchmarking dataset, but also fixes the error via test case augmentation. We show FormalEval can help to identify better LLM prompting techniques on SVA generation task. Our method demonstrates state-of-the-art accuracy on the testing dataset.